The present invention relates to a memory device having a novel structure and operation principle.
As ferroelectric memories utilizing a ferroelectric, a one-transistor (1T) ferroelectric random access memory (FeRAM), a one-transistor one-capacitor (1T1C) FeRAM, and a two-transistor two-capacitor (2T2C) FeRAM have been known.
As the structure of the 1T FeRAM, a metal-ferroelectric-semiconductor (MFS) structure, a metal-ferroelectric-insulator-semiconductor (MFIS) structure, and a metal-ferroelectric-metal-insulator-semiconductor (MFMIS) structure have been known. In FeRAMs having these structures, the amount of drain current at a specific gate voltage is utilized as memory information since the polarization state of the ferroelectric forming a gate insulating film changes the transistor threshold voltage. However, these 1T FeRAMs have many problems. In the MFS structure, since the surface of a group-IV semiconductor substrate formed of silicon or germanium is easily oxidized, it is very difficult to form an oxide ferroelectric layer on the surface of the substrate. This makes it difficult to utilize the MFS structure in practical application. FeRAMs having the MFIS structure or the MFMIS structure also suffer from the same problem.
In the 1T1C and 2T2C FeRAMs, the remanent polarization point in the polarization reversal hysteresis characteristics of the ferroelectric is utilized as memory information. However, these FeRAMs have problems such as the fatigue of the ferroelectric film and the electrode and deterioration in data retention characteristics due to deformation in the hysteresis loop.